Publication: Exploring Instruction Fusion Opportunities in General Purpose Processors
Authors
Singh, Sawan ; Perais, Arthur ; Jimborean, Alexandra ; Ros, Alberto
item.page.secondaryauthor
item.page.director
Publisher
IEEE Press
publication.page.editor
publication.page.department
DOI
https://doi.org/10.1109/MICRO56248.2022.00026
item.page.type
info:eu-repo/semantics/article
Description
© 2023. IEEE.
This document is made available under the CC-BY-NC-ND 4.0 license http://creativecommons.org/licenses/by-nc-nd/4.0
This document is the accepted version of a published work that appeared in final form in MICRO '22: Proceedings of the 55th Annual IEEE/ACM International Symposium on Microarchitecture
To access the final work, see DOI: https://doi.org/10.1109/MICRO56248.2022.00026
Abstract
The Complex Instruction Set Computer (CISC) paradigm has led to the introduction of instruction cracking in which an architectural instruction is divided into multiple microarchitectural instructions (μ-ops). However, the
dual concept, instruction fusion is also prevalent in modern microarchitectures to maximize resource utilization. In essence, some architectural instructions are too complex to be executed as a unit, so they should be cracked, while others are too simple to waste resources on executing them as a unit, so they should be fused with others.
In this paper, we focus on instruction fusion and explore opportunities for fusing additional instructions in a high-
performance general purpose pipeline. We show that enabling fusion for common RISC-V idioms improves performance by 7%. Then, we determine experimentally that enabling fusion only for memory instructions achieves 86% of the potential of fusion in this particular case. Finally, we propose the Helios microarchitecture, able to fuse non-consecutive and non-contiguous memory instructions, and discuss microarchitectural changes required to do so efficiently while preserving correctness. Helios allows to fuse an additional 5.5% of dynamic instructions, yielding a 14.2% performance uplift over no fusion (8.2% over baseline fusion).
publication.page.subject
Citation
MICRO '22: Proceedings of the 55th Annual IEEE/ACM International Symposium on MicroarchitectureOctober 2022 Pages 199–212
item.page.embargo
Collections
Ir a Estadísticas
Este ítem está sujeto a una licencia Creative Commons. http://creativecommons.org/licenses/by-nc-nd/4.0/