Publication: Speculative Inter-Thread Store-to-Load Forwarding in SMT Architectures
| dc.contributor.author | Feliu, Josué | |
| dc.contributor.author | Ros, Alberto | |
| dc.contributor.author | Acacio, Manuel E. | |
| dc.contributor.author | Kaxiras, Stefanos | |
| dc.contributor.department | IngenierĂa y TecnologĂa de Computadores | |
| dc.date.accessioned | 2023-06-29T07:13:57Z | |
| dc.date.available | 2023-06-29T07:13:57Z | |
| dc.date.issued | 2023-03-01 | |
| dc.description | © 2023 ACM, Inc.This manuscript version is made available under the CC-BY-NC-ND 4.0 license http://creativecommons.org/licenses/by-nc-nd/4.0/ This document is the Accepted Manuscript version of a Published Work that appeared in final form Journal of Parallel and Distributed Computing. To access the final edited and published work see DOI.: 10.1016/j.jpdc.2022.11.007 | es |
| dc.description.abstract | Applications running on out-of-order cores have benefited for decades of store-to-load forwarding which accelerates communication of store values to loads of the same thread. Despite threads running on a simultaneous multi-threading (SMT) core could also access the load queues (LQ) and store queues (SQ) / store buffers (SB) of other threads to allow inter-thread store-to-load forwarding, we have skipped exploiting it because if we allow communication of different SMT threads via their LQs and SQs/SBs, write atomicity may be violated with respect to the outside world beyond the acceptable model of read-own-write-early multiple-copy atomicity (rMCA). In our prior work, we leveraged this idea to propose inter-thread store-to-load forwarding (ITSLF). ITLSF accelerates synchronization and communication of threads running in a simultaneous multi-threading processor by allowing stores in the store-queue of a thread to forward data to loads of another thread running in the same core without violating rMCA. In this work, we extend the original ITSLF mechanism to allow inter-thread forwarding from speculative stores (Spec-ITSLF). Spec-ITSLF allows forwarding store values to other threads earlier, which further accelerates synchronization. Spec-ITSLF outperforms a baseline SMT core by 15%, which is 2% better on average (and up to 5% for the TATP workload) than the original ITSLF mechanism. More importantly, Spec-ITSLF is on par with the original ITSLF mechanism regarding storage overhead but does not need to keep track of the speculative state of stores, which was an important source of overhead and complexity in the original mechanism. | es |
| dc.format | application/pdf | es |
| dc.format.extent | 27 | es |
| dc.identifier.citation | Journal of Parallel Distributed Computing (JPDC) | |
| dc.identifier.doi | 10.1016/j.jpdc.2022.11.007 | |
| dc.identifier.issn | 0743-7315 | |
| dc.identifier.uri | http://hdl.handle.net/10201/132503 | |
| dc.language | eng | es |
| dc.relation | European Research Council (ERC) under the European Union’s Horizon 2020 research and innovation programme (ECHO: Extending Coherence for Hardware-Driven Optimizations in Multicore Architectures, grant agreement No 819134, Consolidator Grant, 2018). | es |
| dc.rights | info:eu-repo/semantics/openAccess | es |
| dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
| dc.subject | Simultaneous multithreading | es |
| dc.subject | Memory consistency | es |
| dc.subject | Store-to-load forwarding | es |
| dc.subject | Multiple-copy atomicity | es |
| dc.title | Speculative Inter-Thread Store-to-Load Forwarding in SMT Architectures | es |
| dc.type | info:eu-repo/semantics/article | es |
| dspace.entity.type | Publication | es |
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