Publication: Alternate path µ-op cache prefetching
Authors
Singh, Sawan ; Perais, Arthur ; Jimborean, Alexandra ; Ros Bardisa, Alberto
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Publisher
IEEE Computer Society
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DOI
https://doi.org/10.1109/ISCA59077.2024.00092
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info:eu-repo/semantics/article
Description
© 2024 IEEE. This document is the Submitted version of a Published Work that appeared in final form in ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA). To access the final edited and published work see https://doi.org/10.1109/ISCA59077.2024.00092
Abstract
Datacenter applications are well-known for their
large code footprints. This has caused frontend design to
evolve by implementing decoupled fetching and large prediction
structures – branch predictors, Branch Target Buffers (BTBs)
– to mitigate the stagnating size of the instruction cache by
prefetching instructions well in advance. In addition, many
designs feature a micro operation (µ-op) cache, which primarily
provides power savings by bypassing the instruction cache and
decoders once warmed up. However, this µ-op cache often has
lower reach than the instruction cache, and it is not filled up
speculatively using the decoupled fetcher. As a result, the µ-op
cache is often over-subscribed by datacenter applications, up to
the point of becoming a burden.
This paper first shows that because of this pressure, blindly
prefetching into the µ-op cache using state-of-the-art standalone
prefetchers would not provide significant gains. As a consequence,
this paper proposes to prefetch only critical µ-ops into the µop cache, by focusing on execution points where the µ-op cache
provides the most gains: Pipeline refills. Concretely, we use hardto-predict conditional branches as indicators that a pipeline refill
is likely to happen in the near future, and prefetch into the µ-op
cache the µ-ops that belong to the path opposed to the predicted
path, which we call alternate path. Identifying hard-to-predict
branches requires no additional state if the branch predictor
confidence is used to classify branches. Including extra alternate
branch predictors with limited budget (8.95KB to 12.95KB), our
proposal provides average speedups of 1.9% to 2% and as high
as 12% on a subset of CVP-1 traces.
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