Berti: An Accurate Local-Delta Data Prefetcher

Navarro-Torres, Agustín; Panda, Biswabandan; Alastruey-Benedé, Jesús; Ibáñez, Pablo; Viñals-Yúfera, Victor; Ros, Alberto

Publication:
Berti: An Accurate Local-Delta Data Prefetcher

dc.contributor.author	Navarro-Torres, Agustín
dc.contributor.author	Panda, Biswabandan
dc.contributor.author	Alastruey-Benedé, Jesús
dc.contributor.author	Ibáñez, Pablo
dc.contributor.author	Viñals-Yúfera, Victor
dc.contributor.author	Ros, Alberto
dc.contributor.department	Ingeniería y Tecnología de Computadores
dc.date.accessioned	2022-10-21T10:31:38Z
dc.date.available	2022-10-21T10:31:38Z
dc.date.issued	2022-10
dc.description	© 2022. IEEE. This document is made available under the CC-BY-NC-ND 4.0 license http://creativecommons.org/licenses/by-nc-nd/4.0 This document is the accepted version of a published work that appeared in final form in 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO). To access the final work, see DOI: 10.1109/MICRO56248.2022.00072
dc.description.abstract	Data prefetching is a technique that plays a crucial role in modern high-performance processors by hiding long latency memory accesses. Several state-of-the-art hardware prefetchers exploit the concept of deltas, defined as the difference between the cache line addresses of two demand accesses. Existing delta prefetchers, such as best offset prefetching (BOP) and multi-lookahead prefetching (MLOP), train and predict future accesses based on global deltas. We observed that the use of global deltas results in missed opportunities to anticipate memory accesses. In this paper, we propose Berti, a first-level data cache prefetcher that selects the best local deltas, i.e., those that consider only demand accesses issued by the same instruction. Thanks to a high-confidence mechanism that precisely detects the timely local deltas with high coverage, Berti generates accurate prefetch requests. Then, it orchestrates the prefetch requests to the memory hierarchy, using the selected deltas. Our empirical results using ChampSim and SPEC CPU2017 and GAP workloads show that, with a storage overhead of just 2.55 KB, Berti improves performance by 8.5% compared to a baseline IP-stride and 3.5% compared to IPCP, a state-of-the-art prefetcher. Our evaluation also shows that Berti reduces dynamic energy at the memory hierarchy by 33.6% compared to IPCP, thanks to its high prefetch accuracy.	es
dc.format	application/pdf	es
dc.format.extent	17	es
dc.identifier.doi	https://doi.org/10.1109/MICRO56248.2022.00072
dc.identifier.eissn	978-1-6654-6272-3
dc.identifier.uri	http://hdl.handle.net/10201/124766
dc.language	eng	es
dc.publisher	IEEE
dc.relation	European Research Council (ERC) under the European Union s Horizon 2020 research and innovation programme (ECHO: Extending Coherence for Hardware-Driven Optimizations in Multicore Architectures, grant agreement No 819134, Consolidator Grant, 2018).	es
dc.relation.ispartof	55th International Symposium on Microarchitecture (MICRO)	es
dc.relation.publisherversion	https://ieeexplore.ieee.org/document/9923806
dc.rights	info:eu-repo/semantics/openAccess	es
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/	*
dc.subject	Data prefetching	es
dc.subject	Hardware prefetching	es
dc.subject	First-level cache	es
dc.subject	Local deltas	es
dc.subject	Accuracy	es
dc.subject	Timeliness	es
dc.title	Berti: An Accurate Local-Delta Data Prefetcher	es
dc.type	info:eu-repo/semantics/article	es
dspace.entity.type	Publication	es