TCOR: A Tile Cache with Optimal Replacement

Joseph, D.; Aragón, J.L.; Parcerisa, J.M.; González, A,

Publication:
TCOR: A Tile Cache with Optimal Replacement

dc.contributor.author	Joseph, D.
dc.contributor.author	Aragón, J.L.
dc.contributor.author	Parcerisa, J.M.
dc.contributor.author	González, A,
dc.contributor.department	Ingeniería y Tecnología de Computadores
dc.date.accessioned	2024-01-31T17:13:39Z
dc.date.available	2024-01-31T17:13:39Z
dc.date.issued	2022-04-06
dc.description.abstract	Cache Replacement Policies are known to have an important impact on hit rates. The OPT replacement policy [27] has been formally proven as optimal for minimizing misses. Due to its need to look far ahead for future memory accesses, it is often reduced to a yardstick for measuring the efficacy of other practical caches. In this paper, we bring the OPT to life, in architectures for mobile GPUs, for which energy efficiency is of great consequence. We also mold other factors in the memory hierarchy to enhance its impact. The end results are a 13.8% decrease in the memory hierarchy energy consumption and an increased throughput in the Tiling Engine. We also observe a 5.5% decrease in the total GPU energy and a 3.7% increase in frames per second (FPS).	es
dc.format	application/pdf	es
dc.format.extent	14	es
dc.identifier.citation	Proc. of the 28th IEEE Int. Symposium on High-Performance Computer Architecture (HPCA), Seoul, South Korea, pp. 662-675, ISBN: 978-1-6654-2027-3, Abril 2022
dc.identifier.doi	https://doi.org/10.1109/HPCA53966.2022.00055
dc.identifier.eissn	978-1-6654-2027-3
dc.identifier.uri	http://hdl.handle.net/10201/138323
dc.language	eng	es
dc.publisher	IEEE	es
dc.relation	TÍTULO PROYECTO: "CoCoUnit: An Energy-Efficient Processing Unit for Cognitive Computing" Código: Grant agreement ID 833057 Organismo financiador: European Union, Program EXCELLENT SCIENCE - European Research Council (ERC) Advanced Grant TÍTULO PROYECTO: "Arquitecturas de Dominio Específico para Sistemas de Computación Energéticamente Eficientes" Código: PID2020-113172RB-I00 Organismo financiador: Agencia Estatal de Investigación, Ministerio de Ciencia e Innovación	es
dc.relation.ispartof	28th IEEE Int. Symposium on High-Performance Computer Architecture (HPCA), Seoul, South Korea, Abril 2022	es
dc.relation.requires	https://doi.org/10.1109/HPCA53966.2022.00055	es
dc.rights	info:eu-repo/semantics/openAccess	es
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/	*
dc.subject	GPU	es
dc.subject	Caches	es
dc.subject	Cache Replacement	es
dc.subject	OPT	es
dc.subject	Belady	es
dc.subject	Energy-efficient	es
dc.subject	Pipelines	es
dc.subject	Memory management	es
dc.subject	Memory architecture	es
dc.title	TCOR: A Tile Cache with Optimal Replacement	es
dc.type	info:eu-repo/semantics/lecture	es
dc.type	info:eu-repo/semantics/lecture	es
dspace.entity.type	Publication	es