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Understanding Selective Delay as a Method for Efficient Secure Speculative Execution

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dc.contributor.authorSakalis, Christos
dc.contributor.authorKaxiras, Stefanos
dc.contributor.authorRos, Alberto
dc.contributor.authorJimborean, Alexandra
dc.contributor.authorSjälander, Magnus
dc.contributor.departmentIngeniería y Tecnología de Computadores
dc.date.accessioned2024-02-09T08:29:42Z
dc.date.available2024-02-09T08:29:42Z
dc.date.issued2020
dc.descriptionEmbargo totales
dc.description.abstractSince the introduction of Meltdown and Spectre, the research community has been tirelessly working on speculative side-channel attacks and on how to shield computer systems from them. To ensure that a system is protected not only from all the currently known attacks but also from future, yet to be discovered, attacks, the solutions developed need to be general in nature, covering a wide array of system components, while at the same time keeping the performance, energy, area, and implementation complexity costs at a minimum. One such solution is our own delay-on-miss, which efficiently protects the memory hierarchy by i) selectively delaying speculative load instructions and ii) utilizing value prediction as an invisible form of speculation. In this work we dive deeper into delay-on-miss, offering insights into why and how it affects the performance of the system. We also reevaluate value prediction as an invisible form of speculation. Specifically, we focus on the implications that delaying memory loads has in the memory level parallelism of the system and how this affects the value predictor and the overall performance of the system. We present new, updated results but more importantly, we also offer deeper insight into why delay-on-miss works so well and what this means for the future of secure speculative execution.es
dc.formatapplication/pdfes
dc.format.extent13es
dc.identifier.citationIEEE Transactions on Computers ( Volume: 69, Issue: 11, 01 November 2020)
dc.identifier.doihttps://doi.org/10.1109/TC.2020.3014456
dc.identifier.issnPrint: 0018-9340
dc.identifier.issnElectronic: 1557-9956
dc.identifier.urihttp://hdl.handle.net/10201/139028
dc.languageenges
dc.publisherInstitute of Electrical and Electronics Engineers, IEEE Xplorees
dc.relationThis work was funded by Vetenskapsr°adet project 2015- 05159, by the SSF Strategic Mobility 2017 grant SM17-0064, the Spanish MCIU and AEI, as well as European Commission FEDER grant RTI2018-098156-B-C53. The computations were performed on resources provided by SNIC through UPPMAX.es
dc.rights.accessRightsinfo:eu-repo/semantics/restrictedAccess
dc.subjectSpeculative executiones
dc.subjectSide-channel attackses
dc.subjectMemoryes
dc.subjectSecurityes
dc.titleUnderstanding Selective Delay as a Method for Efficient Secure Speculative Executiones
dc.typeinfo:eu-repo/semantics/articlees
dspace.entity.typePublicationes
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